UART-TTL Integration Guide for LRF Modules
Every module in our 905 nm line speaks the same electrical language: UART-TTL over a 6-pin connector, 3.3–5 V supply, 115200 bps by default. That consistency is deliberate — it means the integration work you do for one model largely carries over to the next. Here's how to bring one up cleanly the first time.
Wiring
| GND | Ground / power − |
|---|---|
| VCC | DC 3.3–5 V supply. Keep ripple under 0.1 V — several modules specify this explicitly, and clean supply rail is the single most common cause of erratic first-boot behaviour. |
| I/O | Reserved for expansion on most models — leave unconnected unless your model's own sheet says otherwise. |
| TXD | Serial transmit, module → host, TTL 3.3 V logic. |
| RXD | Serial receive, host → module, TTL 3.3 V logic. |
| Enable / SW-SHOT | Function or power enable. Naming and active level vary by model — some use active-high, some active-low, and pin order itself is reversed on a few SPD-mini variants (Enable on pin 1, GND on pin 6, rather than the other way round). Always confirm against the specific model's own spec sheet before wiring. |
Power sequencing
Apply VCC within the module's DC 3.3–5 V range and let the ripple settle before asserting Enable — inrush current on our modules typically peaks in the 300–400 mA range for a few milliseconds at power-on, which is easy to miss if you're budgeting off the steady-state operating power figure alone (most modules average well under 1 W). Size your supply rail's transient capability to the peak, not the average, especially if you're sharing a rail with other sensitive electronics.
After Enable, expect a start-up delay before the first valid reading — our flagship, for example, specifies ≤ 160 ms of response time plus a further 100–517 ms for the first ranging cycle to complete. That's representative of the platform generally: budget several hundred milliseconds from power-good to first trustworthy distance value, and don't treat an early read during that window as valid.
The measurement frame
Once running, the module streams distance data as a fixed 8-byte UART frame at 115200 bps (9600 bps optional on some models), 8-N-1:
0x55 0xAA— fixed frame header, your parser's sync point.FUNC— function/command code identifying what kind of frame this is (e.g. a single measurement reply).D0–D3— the payload. For a distance reading, this is the measured value ×10, giving you a one-decimal-place reading in metres once divided back down.CHK— a checksum computed over the preceding bytes. Verify it before trusting the frame; reject and wait for the next frame on mismatch rather than acting on a corrupted read.
A minimal parse loop
The practical parsing pattern is straightforward regardless of host platform (MCU, SBC, FPGA soft-core):
- Read bytes into a small ring buffer.
- Scan for the
0x55 0xAAheader pair to establish frame sync. - Once synced, read the fixed remaining 6 bytes to complete the 8-byte frame.
- Recompute the checksum over the received bytes and compare against
CHK; discard the frame on mismatch and resume scanning for the next header. - On a valid frame, reconstruct the distance from
D0–D3and divide by 10 for the metre reading.
Single-shot vs continuous mode
Depending on the model, the module can be commanded into continuous streaming (reporting at its measurement frequency without further prompting) or single-shot mode (one reading per trigger command). Continuous mode suits closed-loop systems like altitude hold; single-shot suits event-driven use like a handheld rangefinder's shutter button. Mode selection, baud rate, address and frequency are all configurable through the command set and the Windows configuration tool shipped with samples — the full command reference and manual come with your sample order.
Common bring-up pitfalls
- Logic-level mismatch. The interface is TTL 3.3 V. Driving RXD from a 5 V MCU without level shifting can damage the module or corrupt reads over time — use a level shifter or a 5 V-tolerant UART pin if your host runs at 5 V logic.
- Floating Enable pin. An unconnected or lightly-driven Enable/SW-SHOT line can float into an unintended state under vibration or EMI, causing spurious wake or sleep. Drive it deliberately from your host, don't leave it pulled by a weak internal default alone.
- Under-provisioned power rail. Sized for average operating power but not the power-on inrush spike — leads to brownout resets that look like a "dead" module on first bring-up.
- Assuming pin order carries between models. As noted above, a few compact variants reverse the 6-pin order. Confirm against your exact model's sheet, every time.
Bench-testing before you commit to a board layout
Before you commit a module to a PCB footprint, it's worth ten minutes on the bench with a USB-to-TTL serial adapter and a terminal program: power the module from a clean 3.3–5 V source, wire TXD/RXD/GND to the adapter, and watch the raw byte stream. You should see the 0x55 0xAA header repeating at roughly the model's rated measurement frequency once Enable is asserted. If you don't see a stable header cadence at that stage, the problem is almost always power quality or the Enable line — not your parsing code — and it's far cheaper to catch on the bench than after the board is fabricated.
If you get stuck on a specific model's bring-up, tell us the model and what you're seeing — most first-integration issues trace back to one of the points above, and we can usually spot which one from a description of the symptom.